View CXA3218N_261469.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

CXA3218N
FM Demodulator for BS/CS
Description The CXA3218N is the video signal demodulation IC for satellite broadcasting. This IC has most of the functions required for demodulation, and provides stable video detection in combination with the CXA3108Q (L-band down converter with PLL). Features * Built-in IF AGC * Excellent DG/DP characteristics * Keyed AFT input pin to support MUSE reception * 1st AGC control output pin * Single 5 V power supply operation Applications PAL/NTSC system BS tuners, etc. Structure Bipolar silicon monolithic IC 30P pin SSOP (Plastic)
Absolute Maximum Ratings (Ta=25 C) * Supply voltage VCC -0.3 to 7.0 V * Storage temperature Tstg -55 to +150 C * Allowable power dissipation PD 1000 mW Operating Conditions * Supply voltage * Operating temperature
VCC Topr
4.50 to 5.50 -35 to +85
V C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E98X25-TE
CXA3218N
Block Diagram and Pin Configuration (Top View)
AGCCNT
OSCGND
VCODR1
OPAOUT
AGCLPF
OPAINN
OPAINP
OSCB2
OSCE2
OSCE1
30
29
28
27
26
25
24
23
22
21
20
19
OSCB1
IFAGC
LPFN
LPFP
18
17
16
1AGC
AGC DET
MIX
VCO
2AGC
DCAMP OFF SET AGCAMP DET AMP AFT
MTRX AGC
REG
1
MTRXAGC
2
VCC
3
IF IN1
4
IF IN2
5
GND
6
OFFSET
7
DETOUT
8
VREG
9
GCONT
10 AFTDWN
11 AFTUP
12 ANA
13 KEYEDIN
14 SH2
15 SH1
--2--
VCODR2
CXA3218N
Pin Description Pin No. Symbol Typical pin voltage Equivalent circuit Description
VCC
1
MTRXAGC
2.0 V to 3.5 V
100
40k
1
10k GND
AGC detection block MTRX-AGC analog output.
2
VCC
5V
10p
Positive power supply.
3
IF IN1
3 4
10p 400
5k 5k
2.3V
AGC block IF input.
4
IF IN2
GND
5
GND
0V
VCC
Ground.
6
OFFSET
2.0 V to 4.0 V
10k 150
6
AFT block offset adjustment.
GND
VCC 200
7
DETOUT
2.45 V
7
GND
DETAMP block video output.
VCC
8
VREG
4.1 V
8
GND
Reference voltage output. Connect to GND with a 10 F capacitor.
--3--
CXA3218N
Pin No.
Symbol
Typical pin voltage
Equivalent circuit
Description
VCC
9
GCONT
1.5 V to 4.0 V
150
9
15k
3k
2.7V
DETAMP block gain adjustment.
GND
10
AFTDWN 4.9 V or 0.1 V
30k 10 11 30k
VCC
AFT block digital output.
11
AFTUP
GND
VCC 2k
12
ANA
2.4 V to 3.8 V
200 47k
75k 200 12
AFT block filter. Connect to GND with a 10 F capacitor.
2.5V
GND
VCC
13
KEYEDIN
0.3 V
150 13 30k GND 4k
AFT block keyed input.
VCC
14
SH2 3.0 V to 3.5 V
14 15
2k
2k 200
15
SH1
GND
AFT block sample-and-hold signal output. Connect to GND with a 0.1 F capacitor.
--4--
CXA3218N
Pin No.
Symbol
Typical pin voltage
Equivalent circuit
Description
16
VCODR2 2.0 V to 3.0 V
16 17
VCC 50 50
PLL detection output.
10k 10k GND
17
VCODR1
18 19 20 21 22
OSCGND OSCB1 OSCE1 OSCE2 OSCB2
0V 1.4 V 0.7 V 0.7 V 1.4 V
VCC
Ground.
22 21 3k 250 250 3k 20k
19 20
VCO resonance circuit connect terminals.
OSCGND
23
LPFN
23
VCC 260 260
4.5 V 24 LPFP
24
PLL loop filter connect terminals.
GND
VCC 25
25
AGCLPF
2.9 V to 3.0 V
30k
150
AGC detection block filter. Connect to GND with a 0.01 F capacitor.
GND
VCC
26
AGCCNT
1.5 V to 3.5 V
150 26 45k
AGC detection block gain adjustment.
GND
--5--
CXA3218N
Pin No.
Symbol
Typical pin voltage
Equivalent circuit
Description
VCC
27
OPAINP 1.5 V to 3.5 V
150 27
100 100 150 28
AGC detection block 1st AGC input.
28
OPAINN
GND
VCC
29
OPAOUT
0.3 V or 3.5 V
100
29 5k GND
AGC detection block 1st digital output.
VCC
30
IFAGC
2.0 V to 3.0 V
100
40k
30 10k GND
AGC detection block 2nd analog output.
--6--
CXA3218N
Electrical Characteristics DC Characteristics
Item 1 2-1 2-2 3-1 3-2 4-1 4-2 5 6 7 8 Current consumption AGC-1 High output voltage AGC-1 Low output voltage AGC-2 High output voltage AGC-2 Low output voltage AGC-MTRX High output voltage AGC-MTRX Low output voltage VCODR 1/2 output voltage VCODR 1/2 driver current capacitance VREG output voltage SH 1/2 leak current
(Ta=25 C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.)
Pin 2 29 29 30 30 1 1 16, 17 16, 17 8 14, 15 Symbol ICC VAGC1H VAGC1L Conditions When no signal input Vin=-60 dBm, Pin 26=3.0 V, Pin 27=2.5 V Vin=-10 dBm Pin 26=3.0 V, Pin 27=2.5 V Vin=-60 dBm, Pin 26=3.0 V Vin=-10 dBm, Pin 26=3.0 V, Pin 27=2.5 V Vin=-60 dBm, Pin 26=3.0 V, Pin 27=2.5 V 400 MHz input Load resistance RL=1 k Min. 65 3.0 0.1 2.6 1.5 3.0 1.5 2.0 2.0 3.9 KEYEDIN=0.5 V 0 Typ. 80 3.5 0.3 2.9 2 3.5 2.3 2.5 2.5 4.15 0.3 Max. 95 3.7 1.0 3.2 2.4 3.7 2.7 3.0 3 4.4 0.7 mA V A V Unit mA
VAGC2H Vin=-10 dBm, Pin 26=3.0 V VAGC2L VMTRH VMTRL VVCD IVCD VREG ISH
AC Characteristics (AGC)
Item 11 12 13 14 15 16 17 18 IF input frequency IF input level 1st AGC change point (input level) 1st AGC control sensitivity 1st AGC adjustment sensitivity 2nd AGC control sensitivity 2nd AGC adjustment sensitivity AGC-MTRX control sensitivity
(Ta=25 C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.)
Pin 3, 4 3, 4 29 29 29 30 30 1 Symbol fin Vin AGC1 AGC AGC1/V AGC2 AGC2/V MTRX One amplitude for balance input Pin 26=2.5 V, Pin 27=2.5 V Slope of variation Variation of change point/ Pin 27 DC variation Slope of variation Variation of change point/ Pin 26 DC variation Slope of variation Conditions Min. -- -60 -- -- -- 18 3 -- Typ. 400 -- -45 -0.8 42 24 11 0.3 Max. -- -10 dBm -- -- -- 30 18 -- V/dB dB/V mV/dB dB/V V/dB Unit MHz
--7--
CXA3218N
AGC Characteristics (PLL)
Item 21 22 23 24 25-1 25-2 26 27 VCO variation sensitivity VCO oscillation frequency PLL capture range DETOUT level DETOUT level variable range 1 DETOUT level variable range 2 GCONT adjustment sensitivity DETOUT frequency response (8 MHz)
(Ta=25 C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.)
Pin Symbol fosc CAP 7 7 7 7 7 VOUT VPdB VMdB VOUT VOUTf Sum of positive/negative polarities Dev.=17 MHzpp, Pin 9=2.7 V VOUT=0 dB, Pin 9=+0.5 V VOUT=0 dB, Pin 9=-0.5 V Output level/Pin 9 DC variation 8 MHz/1 MHz Conditions 1 1 1 -- 0.60 1 -- 2 -1 40 0.68 2 -2 4 0 -- 0.76 -- -1 6 1 Min. 32 -- Typ. 37 400 Max. 42 -- MHz Vp-p dB dB dB/V dB Unit MHz/V
1 Varies according to the external constant (coil, varicap). This characteristic is for NTSC, and it works at 480 MHz for PAL.
AC Characteristics (Video)
Item 31 32 33 34 IF DET output DG IF DET output DP fsc beat suppression level IF DET output S/N
(Ta=25 C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.)
Pin 7 7 7 7 Symbol DGA DPA IMA CSN IF input IF input IF input IF input Conditions 1 1 Min. 0 -2 40 55 Typ. 0.3 0 45 60 Max. 1.5 2 -- -- Unit % deg dB dB
1 Varies according to the external constant (coil, varicap).
AC characteristics (AFT)
Item 42 43 44 45 AFT offset adjustment sensitivity AFT dead zone width AFTUP/AFTDOWN Low AFTUP/AFTDOWN High
(Ta=25 C, VCC=5 V, See the Electrical Characteristics Measurement Circuit.)
Pin 6 Symbol fAFT/V fAFT/D 10, 11 10, 11 AFTL AFTH Conditions f0 variation/Pin 6 DC variation Min. 5 60 0 4.7 Typ. 8 180 0.1 4.9 Max. 12 360 0.4 VCC Unit MHz/V kHz V
--8--
CXA3218N
Description of Operation The CXA3218N consists of the following four function blocks. First, the signal flow is explained briefly, followed by the functions of each block. (1) AGC circuit (2) FM demodulation circuit (3) Detection signal amplification circuit (4) AFT circuit The 2nd IF differential signal input to IF IN1 and IF IN2 (Pins 3 and 4) passes through the AGC circuit to fix the signal level and is then input to the FM demodulation circuit. The FM demodulated signal by the PLL demodulation circuit is then input to the DETAMP circuit and AFT circuit. The AFT circuit detects the frequency error of the 2nd IF signal by the detection output voltage value, and outputs a command to the external frequency conversion circuits in order to correct the local frequency. (1) AGC circuit The 2nd IF differential signal is input to IF IN1 and IF IN2 (Pins 3 and 4) to fix the signal level by the AGC circuit. A capacitor which determines the AGC loop time constant is connected to AGCLPF (Pin 25), and the adjustment voltage at the AGC (2nd AGC) output setting level is applied to AGCCNT (Pin 26). The 2nd AGC control voltage is output from IFAGC (Pin 30). The 1st AGC starting level adjustment voltage for the 1st IF is applied to OPAINP (Pin 27). The MTRXAGC (Pin 1) output is input through a 0.1 F capacitor. The IFAGC (Pin 30) output is input to OPAINN (Pin 28) through a 10 k resistor, and the 1st AGC control voltage is output from OPAOUT (Pin 29). At this time, the IFAGC (Pin 30) output is used at the linear portion against the input level. (See the Example of Representative Characteristics.) The add voltage of the negative characteristics of the OPAOUT (Pin 29) output 1st AGC control voltage and the IFAGC (Pin 30) output 2nd AGC control voltage is output from MTRXAGC (Pin 1).
MTRXAGC
AGCCNT
AGCLPF
2nd IF signal input
IFAGC
Cc
10k 28
OPAINN
0.1F 27 29
3
4
2nd AGC circuit AGCAMP BOTH-SIDE DETECTION
OPAOUT
(-) AMP
OPAINP
26
25
30
1
1st AGC circuit
COMP
(-) AMP
COMP
ic Rc
(+) AMP
To FM demodulator
--9--
CXA3218N
(2) FM demodulation circuit The FM demodulation circuit is a PLL demodulator which consists of an oscillator (OSC.), phase discriminator and DCAMP. The oscillator resonance circuit is connected to OSCB1 to OSCB2 (Pins 19 to 22) and the loop filter to LPFN (Pin 23) and LPFP (Pin 24). The DCAMP differential output comes from VCODR2 (Pin 16) and VCODR1 (Pin 17), and this output is used as the drive voltage for the varicap that comprises the oscillator. (3) Detection signal amplification circuit The signal which is detected by the FM demodulation circuit is amplified at DETAMP circuit and then output from DETOUT (Pin 7). The gain of this amplification circuit can be adjusted by the voltage applied to GCONT (Pin 9). (4) AFT circuit The AFT circuit detects the frequency error in the 2nd IF signal as a voltage displacement from the FM demodulation signal input to the AFT block, and outputs the two values of High (5 V) or Low (0 V) from AFTDWN (Pin 10) and AFTUP (Pin 11). High indicates the frequency change command (active-High). Furthermore, the High output from both pins indicates the dead zone. The LPF capacitor is connected to ANA (Pin 12) and the keyed pulse for the keyed AFT is input to KEYEDIN (Pin 13). The KEYEDIN (Pin 13) voltage should be 0 V during mean AFT value. The sample-and-hold capacitors are connected to SH2 (Pin 14) and SH1 (Pin 15). Apply the offset adjustment voltage to OFFSET (Pin 6) to cancel the effects of the DC offset in the IC. (5) Other A capacitor is connected to eliminate the regulator voltage noise to VREG (Pin 8), and use this output as the reference voltage for internal adjustment.
--10--
L1 L2 L3
L1 L3 VC 15p 15p 15p 15p VC L2
Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T
VC:HVU-358
100k
5V 0.01 100p 20p 9p 30 LPFP IFAGC LPFN OSCB2 OSCE2 OSCE1 OPAINN OPAINP OPAOUT AGCLPF AGCCNT 29 28 27 26 25 24 23 22 21 20 19 OSCB1 9p 18 OSCGND 1k 10k 1k
1n
100k
10
1n
17 VCODR1
16 VCODR2
1k
Electrical Characteristics Measurement Circuit 1
ANA
KEYEDIN
SH2
MTRXAGC
VCC
IFI N1
IF IN2
GND
OFFSET
DETOUT
VREG
GCONT
AFTDWN
1
10n 1n 0.1
2
3
4
5
6
7
10
8
9
10 1n
11
AFTUP
12
13
14
15
10
0.1
10
100k
5V
DETOUT
100k CXA3218N
0.1
SH1
--11--
CXA3218N
VC:HVU-358 L1 L3 VC 15p 15p 15p 15p VC L2
100k
5V 0.01 100p 1k 9p 21 OSCE2 OSCE1 OSCB1 VCODR1 OSCGND 20 19 18 17 16 VCODR2 1k 20p 9p 30 LPFP IFAGC LPFN OPAINN OPAINP OPAOUT AGCCNT AGCLPF OSCB2 29 28 27 26 25 24 23 22 1k 10k
1n
100k
10
1n
Electrical Characteristics Measurement Circuit 2
CXA3218N
KEYEDIN
SH2
MTRXAGC
VCC
IF IN1
IF IN2
GND
OFFSET
DETOUT
VREG
GCONT
AFTDWN
AFTUP
10n
10
1n
10
10
0.1
100k 5V 100k
15V
10
1n
1.5k
360k 22 330 470p 100k 1.5k
2SC2785 22 4.5M LPF 1M
5p LH0032 12 6 23 43 22 5 11 10 VIDEO OUT 9.1k 10 1n 12p 1k
L1 L2 L3
-15V
Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T
0.1
0.1
1n
--12--
1 2 4 6 7 9 3 5 8
10 11
12
ANA
13
14
15
SH1
CXA3218N
VC:HVU-358 OPAOUT L1 L3 VC 15p 15p 1n 1k 15p 0.01 100p 20p 1k 9p 21 OSCE2 OSCE1 OSCB1 20 19 18 OSCGND 17 VCODR1 16 VCODR2 9p 30 LPFP IFAGC LPFN OPAINN OPAINP OPAOUT AGCCNT AGCLPF OSCB2 29 28 27 26 25 24 23 22 15p 10k VC L2
Application Circuit
100k
5V
100k 1n
10
CXA3218N
ANA
KEYEDIN
SH2
MTRXAGC
VCC
IF IN1
IF IN2
GND
OFFSET
DETOUT
VREG
GCONT
AFTDWN
1 2
10n 1n 10
3 4 6 7
5
8
9
10 1n
11
AFTUP
12
13
14
15
10
0.1
10
100k 100k
5V
DETOUT
MTRXAGC
IFIN
DETOUT
AFTDWN AFTUP
KEYEDIN
L1 L2 L3
Diameter Diameter Number of of wire of coil turns of wire 0.4 2.6 1.5T 0.4 2.6 1.5T 0.4 2.6 5.5T
CXA3218N
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
0.1
0.1
SH1
1k
--13--
CXA3218N
Example of Representative Characteristics
AGCDET characteristics Pin 26 (AGCCNT) =2.5V Pin 27 (OPAINP) =2.5V Pin 1 MTRXAGC 3 Pin 30 IFAGC 2.5 2 1.5 1 Pin 29 OPAOUT 0.5 0 -70 -60 -50 -40 -30 -20 -10 0 Pin 30 (IFAGC) output level (V) Pins 29, 30, 1 output level (V) 3.5 3 Pin 26=2V 2.5 Pin 26=3V 2 Pin 26=2.5V IFAGC characteristics 3.5
4
1.5 -70
-60
-50
-40
-30
-20
-10
0
Input level 400 MHz (dBm)
Input level 400 MHz (dBm)
5 AFTDWN/AFTUP output level (V)
AFT characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V Pin 11 AFTUP Pin 10 AFTDWN fo-Frequency (MHz)
AFT offset adjustment sensitivity characteristics 410 Input level=-40dBm fo=dead zone center frequency
4
405
3
400
2
1 Pin 10 AFTDWN 0 399 399.5 400 Pin 11 AFTUP 400.5 401
395
390
2
2.5
3
3.5
4
Input frequency (MHz)
Pin 6 input voltage (V)
3.7
SH pin voltage characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V
4 3.8
ANA pin voltage characteristics Pin 6 (OFFSET) =3V Pin 13 (KEYEDIN) =0V
SH1/SH2 output level (V)
3.5 Pin 15 SH1 3.3 ANA output level (V) 410
3.6 3.4 3.2 3 2.8 2.6 2.4 2.2
3.1
Pin 14 SH2
2.9
2.7 390
395
400
405
2 398.5
399
399.5
400
400.5
401
401.5
Input frequency (MHz)
Input frequency (MHz)
--14--
CXA3218N
PLL lock characteristics 3.5 3.3 VCODR1 output level (V) 3.1 DETOUT level (dB) 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 375 380 385 390 395 400 405 410 415 420 425 Input frequency (MHz) Input level=-40dBm 2.5 2 1.5 1 0.5 0 -0.5 -1 -1.5 -2 -2.5 2.2
GCONT adjustment sensitivity Input level=-40dBm Video signal Output level is adjust for 0dB when Pin 9=2.7V
2.45
2.7
2.95
3.2
Pin 9 input voltage (V)
DETOUT characteristics 2 1.5 Supply current (mA) DETOUT level (dB) 1 0.5 0 -0.5 -1 -1.5 -2 0 2 4 6 8 10 Pin 9 (GCONT) =2.7V 100 95 90 85 80 75 70 65 60 4
Supply current vs. Supply voltage For no input
4.5
5 Supply voltage (V)
5.5
6
Output frequency (MHz)
--15--
CXA3218N
Package Outline
Unit : mm
30PIN SSOP (PLASTIC)
+ 0.2 1.25 - 0.1 9.7 0.1
0.10
30
16
5.6 0.1
A
1 + 0.1 0.22 - 0.05 0.13 M
15 0.65 + 0.05 0.15 - 0.02
0.1 0.1
0 to 10 NOTE: Dimension "" does not include mold protrusion. DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-30P-L01 SSOP030-P-0056 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 0.1g
NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
--16--
0.5 0.2
7.6 0.2

▲Up To Search▲

Price & Availability of CXA3218N

	To Download CXA3218N Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .